面向 PCI Express 的 Xilinx 解决方案中心
面向 PCI Express 的解决方案中心可提供与 PCI Express 解决方案相关的所有问题。无论您是要启动新设计还是要调试与 Xilinx PCI Express 相关的问题，请访问解决方案中心来指导您获取相应的信息。
设计助手
Xilinx Solution Center for PCI Express - Design Assistant
The Design Assistant for PCIe walks you through the recommended design flow for PCIe while debugging commonly encountered issues such as simulation and hardware problems.
The Design Assistant not only provides useful design and troubleshoot information but also points you to the exact documentation you need to read to help you design efficiently with PCIe.
This article is part of the PCI Express Solution Centre
| (Xilinx Answer 34536) | Xilinx Solution Center for PCI Express |
Release Notes - Xilinx PCI Express Solutions
If you are debugging issues related to specific Xilinx PCI Express core, please check the answer records in the respective core release notes listed below.
Release notes contain Known Issues, Design Advisories, Patches (if any), General Debugging Information, Core Version Information etc.
Versal ACAP DMA and Bridge Subsystem for PCI Express
(Xilinx Answer 75397)
Versal ACAP CPM DMA and Bridge Mode for PCI Express
(Xilinx Answer 75396)
Versal ACAP CPM Mode for PCI Express
(Xilinx Answer 75350)
Versal ACAP Integrated Block for PCI Express
(Xilinx Answer 73083)
(Xilinx Answer 72289)
Queue DMA subsystem for PCI Express
| (Xilinx Answer 70927) |
UltraScale Architecture PHY for PCI Express
| (Xilinx Answer 66988) |
UltraScale+ PCI Express Integrated Block
| (Xilinx Answer 65751) |
DMA Subsystem for PCI Express
| (Xilinx Answer 65443) |
UltraScale FPGA Gen3 Integrated Block for PCI Express
| (Xilinx Answer 57945) |
AXI Bridge for PCI Express Gen3
| (Xilinx Answer 61898) |
Virtex-7 FPGA Gen3 Integrated Block for PCI Express
| (Xilinx Answer 54645) | For v2.0 and onwards in Vivado Design Suite. |
| (Xilinx Answer 47441) | For all versions in ISE Design Suite and versions prior to v2.0 in Vivado Design Suite. |
7 Series Integrated Block for PCI Express
| (Xilinx Answer 54643) | For v2.0 and onwards in Vivado Design Suite. |
| (Xilinx Answer 40469) | For all versions in ISE Design Suite and versions prior to v2.0 in Vivado Design Suite. |
AXI PCI Express
| (Xilinx Answer 54646) | For v2.0 and onwards in Vivado Design Suite. |
| (Xilinx Answer 44969) | For all versions in ISE Design Suite (EDK) and versions prior to v2.0 in Vivado Design Suite. |
Virtex-6 FPGA Integrated Block for PCI Express
| (Xilinx Answer 65178) | Master Answer Record |
Spartan-6 FPGA Integrated Endpoint Block for PCI Express
| (Xilinx Answer 65177) | Master Answer Record |
Endpoint Block Plus Wrapper for PCI Express
| (Xilinx Answer 51597) | Master Answer Record |
IP Release Notes Guide (XTP025) (Updated for ISE Design Suite Only):
http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf
General Xilinx PCI Express Answer Records
| (Xilinx Answer 65176) | This answer record provides a list of general PCI Express Answer Records that are not related to specific Xilinx PCI Express core only. |
PCI Express - Xilinx User Community Forums
http://forums.xilinx.com/t5/PCI-Express/bd-p/PCIe
Xilinx PCI Express Long Form Answer Records
| (Xilinx Answer 56802) | Click here to view answer records that provide comprehensive debugging and packet analysis guide for different issues in a downloadable PDF to enhance its usability. |
Xilinx PCI Express Example Designs, Xilinx Development Boards/Kits and Targeted Reference Designs (TRDs)
| (Xilinx Answer 65174) | This answer record provides links to Xilinx Development Boards/Kits and TRDs. Xilinx Development Boards links provide example design files for respective cores, ready to download bit file, and instructions on how to generate the core and implement the generated example design. |
Xilinx PCI Express Documentation
| (Xilinx Answer 35920) | This answer record provides links to product documentation, white papers and application notes for Xilinx PCI Express solution. |
Xilinx PCI Express - Demo Videos
| (Xilinx Answer 56893) | This answer record provides videos related to Xilinx PCI Express solutions. |
Xilinx High-Speed Serial I/O Solution Center
Xilinx Boards and Kits Solution Center
技术文档
Xilinx Solution Center for PCI Express - Documentation
This answer record provides links to product documentation, white papers and application notes for the Xilinx PCI Express Solution Center.
This article is part of the PCI Express Solution Center
| (Xilinx Answer 34536) | Xilinx Solution Center for PCI Express |
Product Documentation
http://www.xilinx.com/support.html#documentation
White Papers
- WP464: PCI Express for UltraScale Architecture-Based Devices
- WP350: Understanding Performance of PCI Express Systems
- WP384: PCI Express for the 7 Series FPGAs
- WP363: Spartan-6 FPGA Connectivity Targeted Reference Design Performance
Application Notes
- XAPP1177: Designing with SR-IOV Capability of Xilinx Virtex-7 PCI Express Gen3 Integrated Block
- XAPP1179: Using Tandem Configuration for PCIe in the Kintex-7 Connectivity TRD
- XAPP1184: PIPE Mode Simulation Using Integrated Endpoint PCI Express Block in Gen2 x8 and Gen3 x8 Configurations
- XAPP1171: PCI Express Endpoint-DMA Initiator Subsystem
- XAPP1201: Virtex-7 (XT and HT) and UltraScale FPGAs Gen3 Integrated Block for PCI Express to AXI4-Lite Bridge
- XAPP1198: In-System Eye Scan of a PCI Express Link with Vivado IP Integrator and AXI4
- XAPP859: Virtex-5 FPGA Integrated Endpoint Block for PCI Express Designs: DDR2 SDRAM DMA Initiator Demonstration Platform
- XAPP1002: Using ChipScope Pro to Debug Endpoint Block Plus Wrapper, Endpoint, and Endpoint PIPE
- XAPP 1022: Using the Memory Endpoint Test Driver (MET) with the Programmed Input/Output Example Design for PCI Express Endpoint Cores
- XAPP 1052: Bus Master DMA Performance Demonstration Reference Design for the Xilinx Endpoint PCI Express Solutions
- XAPP518: In-System Programming of BPI PROM for Virtex-6 FPGAs Using PCI Express Technology
- XAPP883: Fast Configuration of PCI Express Technology through Partial Reconfiguration
设计咨询
有关面向 PCI Express 的 7 系列/Virtex-6/Spartan-6 集成模块和 Virtex-5 FPGA 端点模块封装的设计咨询
针对一般设计过程出现的重大问题创建设计咨询答复记录，精选后用于 Xilinx 提醒通知系统。
有关 PCI Express 的解决方案中心，敬请参考(Xilinx 答复 34536)。
(Xilinx 答复 56891) - 有关 7 系列 FPGA 的 PCI Express 集成模块封装的设计咨询
(Xilinx 答复 33775) - 有关 Virtex-6 FPGA 的 PCI Express 集成模块封装的设计咨询
(Xilinx 答复 33776) - 有关 Spartan-6 FPGA 的 PCI Express 集成模块封装的设计咨询
(Xilinx 答复 33580) - 有关 Virtex-5 FPGA 的 PCI Express 端点模块封装的设计咨询
注： 对于 7 系列 FPGA 的 PCI Express 集成模块封装，敬请参考内核发布说明。
其他 PCI Express 核的设计咨询列于相关内核发布说明。
修订历史
09/03/2012 - 初始版本