Version Found: Vivado 2020.1
Version Resolved and other Known Issues: (Xilinx Answer 65443)
When the DMA/Bridge Subsystem for PCI Express IP is configured with "Include GT Wizard in Example Design", the IP example design generation fails.
This article is part of the PCI Express Solution Centre
| (Xilinx Answer 34536) | Xilinx Solution Center for PCI Express |
This a known issue to be fixed in a future version of the core.
The issue can be resolved using the patch attached to this Answer Record.
The patch contains a "readme" file which includes installation instructions.
Revision History:
10/08/2020 - Initial Release
| 文件名 | 文件大小 | File Type |
|---|---|---|
| AR75566_Vivado_2020_1_1_preliminary_rev1.zip | 5 MB | ZIP |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 65443 | DMA Subsystem for PCI Express - Release Notes and Known Issues for Vivado 2015.3 and newer tool versions | N/A | N/A |
| AR# 75566 | |
|---|---|
| 日期 | 12/08/2020 |
| 状态 | Active |
| Type | 已知问题 |
| IP | |