AXI Virtual FIFO Controller

The AXI Virtual controller is provided under the terms of the XILINX End User License and is included with ISE® and Vivado® design tools at no additional charge.

Xilinx provides the AXI Virtual FIFO Controller core to use external DRAM memory as multiple FIFO blocks.

The AXI Virtual FIFO Controller is a key Interconnect Infrastructure IP which enables users to access external memory segments as multiple FIFO blocks. The AXI Virtual Controller provides AMBA® AXI4-Stream write (master) as well as read (slave) interface to AXI4 DRAM memory mapped interface of external memory.