Please refer to the following documentation when using Xilinx Configuration Solutions.
Note: This answer record is part of the Xilinx Configuration Solution Center (Xilinx Answer 34904)
The Xilinx Configuration Solution Center is available to address all questions related to Configuration.
Virtex-6
(UG360) | Virtex-6 FPGA Configuration User Guide |
(UG365) | Virtex-6 Packaging and Pinout Specifications |
(UG623) | Virtex-6 Libraries Guide for HDL Designs |
(DS152) | Virtex-6 FPGA Data Sheet: DC and AC Switching Characteristics |
(DS153) | Virtex-6 CXT Family Data Sheet |
(XAPP1084) | Developing Tamper Resistant Designs with Xilinx Virtex-6 and 7 Series FPGAs |
(XAPP1073) | NSEU Mitigation in Avionics Applications |
(XAPP883) | Fast Configuration of PCI Express Technology through Partial Reconfiguration |
(XAPP733) | Applying MultiBoot and the LogiCORE IP Soft Error Mitigation Controller |
(XAPP517) | Dual Use of ICAP with SEM Controller |
(XAPP497) | Bitstream Identification with USR_ACCESS |
(WP402) | Considerations Surrounding Single Event Effects in FPGAs, ASICs, and Processors |
(WP374) | Partial Reconfiguration of Xilinx FPGAs Using ISE Design Suite |
(WP365) | Solving Today's Design Security Concerns |
ML605 MultiBoot Design Presentation and Design |
Spartan-6
(UG380) | Spartan-6 FPGA Configuration User Guide |
(UG385) | Spartan-6 Packaging and Pinouts Specifications |
(UG615) | Spartan-6 Libraries Guide for HDL Designs |
(DS162) | Spartan-6 FPGA Data Sheet: DC and AC Switching Characteristics |
(XAPP733) | Applying MultiBoot and the LogiCORE IP Soft Error Mitigation Controller |
(XAPP517) | Dual Use of ICAP with SEM Controller |
(XAPP1146) | Embedded Platform Software and Hardware In-the-Field Upgrade Using Linux |
(WP402) | Considerations Surrounding Single Event Effects in FPGAs, ASICs, and Processors |
(WP365) | Solving Today's Design Security Concerns |
SP601 MultiBoot Design Presentation and Design |
Virtex-5
(UG191) | Virtex-5 FPGA Configuration User Guide |
(UG195) | Virtex-5 Packaging and Pinout Specification |
(UG520) | Virtex-5Q Packaging and Pinout Specification |
(UG621) | Virtex-5 Libraries Guide for HDL Designs |
(DS202) | Virtex-5 FPGA Data Sheet: DC and Switching Characteristics |
(DS714) | Virtex-5Q FPGA Data Sheet: DC and Switching Characteristics |
(DS692) | Radiation Hardened, Space-Grade Virtex-5QV FPGA Data Sheet: DC and Switching Characteristics |
(XAPP1100) | MultiBoot with Virtex-5 FPGAs and Platform Flash XL |
(XAPP1020) | Post-Configuration Access to SPI Flash Memory with Virtex-5 FPGAs |
(XAPP973) | Indirect Programming of BPI PROMs with Virtex-5 FPGAs |
(XAPP951) | Configuring Xilinx FPGAs with SPI Serial Flash |
(XAPP645) | Single Error Correction and Double Error Detection |
(XAPP502) | Using a Microprocessor to Configure Xilinx FPGAs via Slave Serial or SelectMAP Mode |
(XAPP497) | Bitstream Identification with USR_ACCESS |
(XAPP290) | Difference-Based Partial Reconfiguration |
(XAPP137) | Configuring Virtex FPGAs from Parallel EPROMs with CPLD |
(XAPP058) | Xilinx In-System Programming Using an Embedded Microcontroller |
High Reliability and Space Developers' Site |
Spartan-3A/AN Configuration Solutions
(UG332) | Spartan-3 Generation Configuration User Guide |
(UG333) | Spartan-3AN FPGA In-System Flash User Guide |
(XAPP1034) | Reference System: Accessing Spartan-3AN In-System Flash using XPS SPI |
(XAPP974) | Indirect Programming of SPI Serial Flash PROMs with Spartan-3A FPGAs |
Generic Configuration Solutions
(UG344) | USB Cable Installation Guide |
(DS300) | Platform Cable USB |
(DS593) | Platform Cable USB-II |
(DS617) | Platform Flash XL High-Density Configuration and Storage Device |
(UG438) | Platform Flash XL Configuration and Storage Device User Guide |
(DS123) | Platform Flash In-System Programmable Configuration PROMs |
(UG161) | Platform Flash PROM User Guide |
(XAPP058) | Xilinx In-System Programming Using an Embedded Microcontroller (ISE Tools) |
(XAPP503) | SVF and XSVF File Formats for Xilinx Devices |
Note: When reviewing any of the documentation in this Xilinx Answer Record, ensure the most recent version is being reviewed.
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
34904 | Xilinx Configuration Solution Center | N/A | N/A |
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
34904 | Xilinx Configuration Solution Center | N/A | N/A |
37252 | Xilinx 配置解决方案中心 — 配置设计咨询 | N/A | N/A |