AR# 53786

The PDF document provided in this answer record describes the generation of the 7 Series Xilinx Integrated PCI Express Block core in Vivado Design Suite. All the steps are illustrated with screenshots. Along with the CORE generation, simulation and debugging of the hardware using ChipScope tool have also been described. The main purpose of this document is to provide all of the details new Vivado Design Suite users need to know in order to design in the Vivado platform using 7 Series Xilinx Integrated PCI Express Block core. Users who are familiar with generating the core in CORE Generator will find this document helpful in quick migration from CORE Generator to Vivado platform.