AR# 67440

描述

Version Found: v2.1 (Vivado 2016.1)

Version Resolved and other Known Issues: (Xilinx Answer 61898)

When I generate the AXI Bridge for PCI Express Gen3 core by unchecking the 'Master Interface', the tool gives the following error message:

[IP_Flow 19-3505] IP Generation error: Failed to generate IP 'axi_pcie3_0'. Failed to generate 'Examples' outputs:

This article is part of the PCI Express Solution Centre

解决方案

This issue will be fixed in the next release of the core. 

Please install the patch in Vivado 2016.1 as described below:

METHOD 1:

1. Navigate to the $XILINX_VIVADO/patches directory (create this directory if it does not exist)
2. Extract the contents of the ".zip" archive to a directory starting with the name AR67440
   Note: most extraction tools will allow you to automatically create a directory with the same name as the zip file
3. Run Vivado software tools from the original install location.

METHOD 2:

1. Create a separate directory for the patched files
2. Extract the contents of the ".zip" archive to the desired patch directory location
3. Set the MYVIVADO environment variable to point to the Vivado directory under this patch directory
   For example:
   set MYVIVADO=C:\MYVIVADO\vivado-patch-AR67440
4. Run Vivado software tools from the original install location.

Revision History:

07/20/2016 - Initial Release

附件