AR# 75397

描述

This answer record contains the Release Notes and Known Issues for the Versal ACAP DMA and Bridge Subsystem for PCI Express IP core and includes the following:

• General Information
• Known and Resolved Issues

This article is part of the PCI Express Solution Centre

Xilinx Forums:

Please seek technical support via the PCI Express Board. The Xilinx Forums are a great resource for technical support.

The entire Xilinx Community is available to help here, and you can ask questions and collaborate with Xilinx experts to get the solutions you need.

解决方案

Supported devices can be found in the following locations:

• Open the Vivado tool -> IP Catalog, right-click on the IP and select Compatible Families.
• For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado design tools

Tactical Patch

The following table provides a list of tactical patches for the Versal ACAP DMA and Bridge Subsystem for PCI Express IP applicable on the corresponding Vivado tool versions.

Known and Resolved Issues

The following table provides known issues for the Versal ACAP DMA and Bridge Subsystem for PCI Express IP.

Note: The "Version Found" column lists the version the problem was first discovered.

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Other Information:

• NA

Revision History:

• 07/24/2020 - Initial Release