2. IP 核
  3. QDRIV SRAM Core

QDRIV SRAM Core

Overview

Product Description

This Physical Layer core gives you the ability to simultaneously read and write on every rising and falling edge. QDRIV is a low-latency SRAM-based standard, used in cache coherent systems, data and packet buffering, lookup tables, and other networking applications.

Key Features and Benefits

  • x18, x36 device targets
  • Very low latency reads
  • 2 word burst support
  • Reliable and predictable transaction times
  • Separate read and write busses
  • Source code delivery in Verilog

Resource Utilization

Support

器件系列:

设计工具:

Documentation

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