The Zynq-7000 SoC Solution Center is available to address all questions related to the Zynq-7000 SoC.
Whether you are starting a new design with Zynq-7000 SoC or troubleshooting a problem, use the Zynq-7000 SoC solution center to guide you to the right information.
QUICK LINKS
UG1046 UltraFast Embedded Design Methodology Guide
Software Developer Solution Center
The Design Assistant will walk you through the recommended design flow for Zynq-7000 SoC while debugging commonly encountered issues. The Design Assistant will not only provide useful design and troubleshooting information, but also point you to the exact documentation you need to read to help you design efficiently with Zynq-7000 SoC.
Note: This answer record is part of Xilinx Zynq-7000 SoC Solution Center (Xilinx Answer 52512). Xilinx Zynq-7000 SoC Solution Center is available to address all questions related to Zynq-7000 SoC. Whether you are starting a new design with Zynq-7000 SoC or troubleshooting a problem, use the Zynq-7000 SoC Solution Center to guide you to the right information.
Please select the design phase where you have a question or are troubleshooting an issue related to your Zynq-7000 SoC design.
This will ensure the Zynq-7000 SoC Design Assistant points you to the information you need to continually move forward with your design.
System Design Assistant
| (Xilinx Answer 52538) | Zynq-7000 SoC Boot and Configuration helps you find all Zynq-7000 SoC answer records related to boot and configuration common questions or known issues |
| (Xilinx Answer 51779) | Zynq-7000 SoC Example Designs and Tech Tips contains useful hints to help with the HW design of your Zynq-7000 Programmable Logic (PL) |
| (Xilinx Answer 50863) | Zynq-7000 SoC Debug keeps track of all the Zynq-7000 SoC answer records related to all the debug solutions available, including debug guides and how to setup third-party debugging tools |
| (Xilinx Answer 52540) | Zynq-7000 SoC FAQs helps you find all Zynq-7000 SoC frequently asked questions |
Hardware and IPs Design Assistant
| (Xilinx Answer 52539) | Zynq-7000 SoC Board Design helps you find all Zynq-7000 SoC answer records related to board design common questions or known issues |
| (Xilinx Answer 53051) | Zynq-7000 SoC - PS DDR Controller helps you find all Zynq-7000 SoC answer records related to the Processing System (PS) DDR Controller (DDRC), including common questions and known issues |
Software Design Assistant
| (Xilinx Answer 55831) | Software Developer Solution Center provides a central location for all known issues relating to Software Development within any of the Xilinx tools (SDK, Vivado Design Suite, etc.) |
| (Xilinx Answer 52600) | Zynq-7000 SoC Standalone Applications Development helps you find all Zynq-7000 SoC answer records related to Standalone common questions or known issues |
| (Xilinx Answer 52599) | Zynq-7000 SoC Operating Systems Development helps you find all Zynq-7000 SoC answer records related to OS' common questions or known issues |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 52539 | Zynq-7000 SoC - Board Design | N/A | N/A |
| 52538 | Zynq-7000 SoC - Boot and Configuration | N/A | N/A |
| 52540 | Zynq-7000 SoC - Frequently Asked Questions | N/A | N/A |
| 51779 | Zynq-7000 SoC - Example Designs and Tech Tips | N/A | N/A |
| 50863 | Zynq-7000 SoC - 调试 | N/A | N/A |
| 52600 | Zynq-7000 SoC - Standalone Applications Development | N/A | N/A |
| 53051 | Zynq-7000 SoC - PS DDR Controller | N/A | N/A |
Documentation Guide
Product Page
Be sure to explore the Zynq-7000 SoC Product Page and the other Xilinx Product Pages.
Product Support Website
Find documents on the Xilinx Product Support Website.
Be sure to click the tabs to reveal documentation for Boards and Kits, Programmable Logic IP, Design Tools, Application Notes and White Papers.
Documentation Navigator (DocNav) Database
DocNav is an indexed database of documents for our hardware products, design suites, and other deliverables. DocNav (~100 MBs) can be downloaded from the Xilinx Download webpage. More DocNav information can be found in (Xilinx Answer 50463).
Document Releases
New and updated Zynq-7000 SoC documents are added to our Xilinx Product Support Documentation Website and our DocNav database.
Sign-up for document release notifications. Sign In or create a new account on Xilinx.com and select your notifications.
Answer Records
These articles provide guidance on a range of topics to provide timely and extended knowledge of our products. Find answer records, forums and other documentation using our Search Support Website.
Forums
The Xilinx sponsored forums are listed on our Xilinx User Community Forums Website. Search or Sign In and become a member.
Internet Searches
The internet can also be a very good source of help. Use searches with and without the Xilinx name. Internet searches can be helpful finding resolutions to error and warning messages.
Device Documents (Xilinx)
UG585 Zynq-7000 Technical Reference Manual (TRM) is the comprehensive (1700+ page) user guide that includes architecture, functional descriptions, and detailed descriptions of the control and status registers in Zynq SoC. This user guide is designed for the system architect and register-level programmer. The functionality of the PS side of Zynq SoC is the same for all devices (except for the limitations in the Z-7010 CLG225 device).
All Data Sheets, Errata Sheets, and other User Guides are accessible from the Xilinx Product Support Documentation Website.
DS187, Zynq-7000 SoC (7010 and 7020): AC and DC Switching Characteristics Data Sheet
DS191, Zynq-7000 SoC (7030, 7045, and 7100): AC and DC Switching Characteristics Data Sheet
UG865, Zynq-7000 SoC Packaging and Pinout Specifications
UG821, Zynq-7000 SoC Software Developers Guide
UG933, Zynq-7000 SoC PCB Design and Pin Planning Guide
(Xilinx Answer 47916) Lists the Errata Sheets and Related Answer Records
The Zynq-7000 TRM also includes an appendix of documentation links.
Device Documents (3rd Party)
IP suppliers for PS resources are listed in (Xilinx Answer 47921). Also visit the ARM Infocenter Website.
UG585 Zynq-7000 TRM includes a list of third party IP. Xilinx is only able to provide ARM third party documentation links.
7 Series Device Documents Related to Zynq-7000
The programmable logic in Zynq SoC is very similar to the 7 Series Artix and Kintex FPGAs. The PL resources are described in the Programmable Logic Description chapter of the UG585 Zynq-7000 TRM. The Zynq-7000 TRM Appendix includes a list of Xilinx 7 Series documents.
Board Documents
Visit AR43746 - Xilinx Boards and Kits Solution Center - Documentation for a full list of Xilinx Board Kits and their associated documents.
Visit ZedBoard.org, a community-based website featuring Avnet's development boards based on the Zynq-7000 7z020 and 7z010 devices.
Revision History
August 2013: Revamped.
Zynq 数据表、技术参考手册和其他文档均包含 Zynq-7000 器件。
此处列举了重要的设计咨询和其他超出这些文档范围的重要事项。
Xilinx Zynq-7000 SoC 解决方案中心 (Xilinx Answer 52512) 中总结了技术内容。
2021 年 3 月 15 日发布的设计咨询
| (Xilinx Answer 76201) | Zynq-7000 SoC 设计咨询：BootROM NAND 驱动中发生缓冲器上溢 | [SECURITY] |
2021 年 3 月 8 日发布的设计咨询
| (Xilinx Answer 76125) | Zynq-7000 SoC 和 Zynq UltraScale+ MPSoC/RFSoC 设计咨询：2020.3（及更低版本）的 Bootgen 无法将旧身份验证密钥文件替换为使用“-generate_keys”选项生成的新身份验证密钥文件。 | [SECURITY] |
| (Xilinx Answer 76171) | 设计咨询：赛灵思建议用户自行为现场系统生成密钥，然后将生成的密钥提供给开发工具。 | [SECURITY] |
| (Xilinx Answer 71437) | Zynq-7000 的设计咨询：2018.2（或更早版本）U-Boot 不验证分区报头。 | [SECURITY] |
| (Xilinx Answer 71436) | Zynq-7000 的设计咨询：2018.2（或更早版本）U-Boot 在加载分区时不使用 BootROM 验证并存储在 OCM 中的 PPK。 | [SECURITY] |
2018 年 8 月 6 日发布的设计咨询
| (Xilinx Answer 71225) | 面向 Zynq-7000 的设计咨询：FSBL 在外部 DDR 中验证启动映像 | [SECURITY] |
| (Xilinx Answer 71292) | Zynq-7000 的设计咨询：FSBL 根据分区报头的内容在分区上执行安全操作。 | [SECURITY] |
2018 年 4 月 9 日发布的设计咨询提醒
| (Xilinx Answer 70537) | 针对所有 ISE 版本和 Vivado 2017.2 及更早版本的 Zynq-7000 SoC RSVDGND 引脚和 PL STARTUPE2 原语需求的设计咨询 |
2016 年 11 月 1 日发布的设计咨询提醒
| (Xilinx Answer 68006) | Xilinx 设计工具（Vivado、SDAccel、SDSoC）2016.1 和 2016.2 write_bitstream 的设计咨询 — 多线程可能会导致配置存储器单元设置不正确 |
2016 年 8 月 8 日发布的设计咨询提醒
| (Xilinx Answer 66871) | 加电过程中，7 系列 FPGA 和 Zynq-7000 SoC HR I/O 转换 |
2015 年 11 月 2 日发布的设计咨询提醒
| (Xilinx Answer 65688) | Zynq-7000 PS DDR 设计咨询： 高温降额可能对 LPDDR2 DRAM 不足 |
2015 年 10 月 19 日发布的设计咨询提醒
| (Xilinx Answer 65145) | Zynq-7000 PS DDR 设计咨询 - DDR3 CKE 断言时间太短 |
2015 年 9 月 14 日发布的设计咨询提醒
| (Xilinx Answer 65240) | Zynq-7000 SoC 设计咨询：PS eFUSE 完整性的加电/断电序列要求 |
2015 年 2 月 23 日发布的设计咨询提醒
| (Xilinx Answer 63149) | Zynq-7000 SoC 设计咨询：由 PS_POR_B 复位序列触发的安全锁定 |
2014 年 6 月 23 日发布的设计咨询
| (Xilinx Answer 60848) | 面向 Zynq-7000 SoC 的设计咨询: 静态存储控制器、并行 (SRAM/NOR) 接口 64MB 配置问题 |
2014 年 6 月 2 日发布的设计咨询提醒
| (Xilinx Answer 60454) | 设计咨询 Zynq-7000 PS DDR 控制器 - DDR IO 在 ISE/EDK 和 Vivado 2013.3 及更早版本中配置不当 |
2014 年 4 月 28 日发布的设计咨询提醒
| (Xilinx Answer 59999) | Zynq-7000 SoC 的设计咨询，eMMC - JEDEC 标准4.41 需要 3 ns 的输入保持时间。 |
2013 年 12 月 9 日发布的设计咨询
| (Xilinx Answer 57930) | Zynq-7000 SoC 设计咨询- 当 VMODE 设置成 1.8V 时，边界扫描测试失败 |
| (Xilinx Answer 58694) | Zynq-7000 SoC 设计咨询 - 最新的 UG933 有些情况下可能需要附加的去耦电容。 |
2013 年 10 月 14 日发布的设计咨询
| (Xilinx Answer 57744) | Zynq-7000 SoC 的设计咨询 — 使用大于 16MB 的闪存时 Zynq 和 QSPI 的复位要求 |
2013 年 9 月 16 日发布的设计咨询
| (Xilinx Answer 57193) | Artix-7、Kintex-7、Virtex-7、Zynq-7000 封装的设计咨询 - 7 系列热阻值（Theta-JA、Theta-JB 和 Theta-JC）更新，提供更精确的值，许多值有大幅更改 |
2013 年 6 月 24 日发布的设计咨询提醒
| (Xilinx Answer 56195) | Zynq-7000 SoC 设计建议：适用于 ES 芯片的设计为什么现在不能通过生产芯片启动？ |
2013 年 2 月 18 日发布的设计咨询提醒
| (Xilinx Answer 47916) | 与勘误表项目有关的答复记录：Zynq-7000 SoC 器件 — 芯片修订版差异 |
| (Xilinx Answer 53450) | 面向 Zynq-7000 SoC、USB 的设计咨询 - ULPI 接口要求输入保持时间为 1 ns |
| (Xilinx Answer 54190) | Zynq-7000 SoC 的设计咨询、APU — L2 高速缓存运行需要编程 slcr.L2C_RAM 寄存器 |
| (Xilinx Answer 54195) | Zynq-7000 VCCPLL 灵敏度的设计咨询建议 |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 53450 | 面向 Zynq-7000 SoC、USB 的设计咨询 - ULPI 接口要求输入保持时间为 1 ns | N/A | N/A |
| 54190 | Zynq-7000 SoC 的设计咨询、APU — L2 高速缓存运行需要编程 slcr.L2C_RAM 寄存器 | N/A | N/A |
| 54195 | Design Advisory for Zynq-7000 SoC - VCCPLL Sensitivity | N/A | N/A |
| 56195 | Zynq-7000 SoC 设计咨询：适用于 ES 芯片的设计为什么现在不能通过生产芯片启动？ | N/A | N/A |
| 57744 | Zynq-7000 SoC 的设计咨询 — 使用大于 16MB 的闪存时 Zynq 和 QSPI 的复位要求 | N/A | N/A |
| 57930 | Zynq-7000 SoC 设计咨询- 当 VMODE 设置成 1.8V 时，边界扫描测试失败 | N/A | N/A |
| 58694 | Zynq-7000 SoC 设计咨询 - 最新的 UG933 有些情况下可能需要附加的去耦电容。 | N/A | N/A |
| 60454 | 设计咨询 Zynq-7000 PS DDR 控制器 - DDR IO 在 ISE/EDK 和 Vivado 2013.3 及更早版本中配置不当 | N/A | N/A |
| 63149 | Design Advisory for Zynq-7000 SoC: Secure Lockdown triggered by PS_POR_B reset sequence | N/A | N/A |