AR# 54476

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LogiCORE IP DUC/DDC Compiler - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions

描述

This answer record contains the Release Notes and Known Issues for the LogiCORE IP DUC/DDC Compiler core and includes the following:
  • General Information
  • Known and Resolved Issues
  • Revision History
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and newer tool versions.
Please reference XTP025 - IP Release Notes Guide for past known issue logs and ISE support information.

LogiCORE IP DUC/DDC Compiler core IP Page:
https://www.xilinx.com/content/xilinx/en/products/intellectual-property/duc_ddc_compiler.html

解决方案

General Information

Supported devices can be found in the following three locations:

For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado design tools.

Version Table

This table correlates the core version to the first Vivado design tools release version in which it was included.

Core VersionVivado Tools Version
v3.0(Rev. 4)2014.1
v3.0(Rev. 3)2013.4
v3.0(Rev. 2)2013.3
v3.0(Rev. 1)2013.2
v3.02013.1


General Guidance

The table below provides answer records for general guidance when using the LogiCORE IP DUC/DDC Compiler core.

Answer RecordTitle
N/AN/A



Known and Resolved Issues

The following table provides known issues for the LogiCORE IP DUC/DDC Compiler core, starting with v3.0, initially released in Vivado 2013.1.

Note: The "Version Found" column lists the version the problem was first discovered. 

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Answer RecordTitleVersion FoundVersion Resolved
(Xilinx Answer 59798)Behavioral simulation using Synopsys VCS simulator may give incorrect outputsv3.0(Rev. 4)N/A
(Xilinx Answer 58585)The core might issue a critical warning during implementation: "CRITICAL WARNING: [Netlist 29-98] The DSP48E2 multiplier has increased from 25x18 to 27x18" v3.0(Rev. 3)N/A
(Xilinx Answer 56376)Some configurations of the DUC/DDC Compiler v3.0 core do not simulate correctly when Vivado Simulator is used to perform behavioral simulation v3.0N/A


Revision History
03/17/2014Updated for 2014.1; added (Xilinx Answer 59798)
12/18/2013Updated for 2013.4; added (Xilinx Answer 58585)
06/26/2013Added (Xilinx Answer 56376)
04/03/2013Initial Release

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AR# 54476
日期 09/03/2019
状态 Active
Type 版本说明
Tools
IP
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