SDSoC Development Environment

Overview

Note: Starting 2019.2, Xilinx SDK, SDSoC™ and SDAccel™ development environments are unified into an all-in-one Vitis™ unified software platform for application acceleration and embedded software development. There will be no 2019.2 or future releases of Xilinx SDSoC Development Environment.

Familiar Embedded C/C++/OpenCL Application Development Experience

The SDSoC™ development environment provides a familiar embedded C/C++/OpenCL application development experience including an easy to use Eclipse IDE and a comprehensive design environment for heterogeneous Zynq^® SoC and MPSoC deployment. Complete with the industry's first C/C++/OpenCL full-system optimizing compiler, SDSoC delivers system level profiling, automated software acceleration in programmable logic, automated system connectivity generation, and libraries to speed programming. It also enables end user and third party platform developers to rapidly define, integrate, and verify system level solutions and enable their end customers with a customized programming environment.

Xilinx OpenCV libraries are now available featuring 50+ hardware optimized OpenCV functions, including Gausian, Median, Bilateral, Harris corner, Canny edge detection, HoG, SVM, LK Optical Flow, and many more
Easy to use Eclipse IDE to develop a full Zynq SoC and MPSoC system with embedded C/C++/OpenCL applications
Accelerate a function in Programmable Logic (PL) with a click of button
Supports bare metal, Linux and FreeRTOS as target OS

System-Level Profiling

Rapid performance estimation and area estimation including PS, data communication and PL in minutes
Automated run-time instrumentation of cache, memory and bus utilizations
Enables early and rapid generation and exploration for optimal total system architecture

Full System Optimizing Compiler

Compiles C/C++/OpenCL applications into a fully functional Zynq SoC and MPSoC system
Automatic function acceleration in programmable logic generating both the ARM software and FPGA bitstream
Optimizes the system connectivity and allows rapid system exploration of throughput, latency and area tradeoffs

Expert Use Model for Platform Developers

Target custom board by proven methodology to convert existing Vivado project and software project into SDSoC
Board Support Packages (BSP) for Zynq-based development boards are available today including the ZCU102, ZC702, ZC706, as well as third party boards and System-on-Module (SoM) including Zedboard, Microzed, Zybo, Avnet Embedded Vision Kit, Video and Imaging Kit, SDR kit and more. Please click on the "Board and Modules" for the full list BSPs.

Libraries & Design Examples

Hardware Optimized Libraries

Library Suites	Latest SDSoC Version Supported	Provider
xfOpenCV 50+ hardware optimized OpenCV functions, including Gausian, Median, Bilateral, Harris corner, Canny edge detection, HoG, ORB, SVM, LK Optical Flow, and many more	2018.3	Xilinx

Design Example Provided by Xilinx

Design Example & Descriptions	Latest SDSoC Version Supported	Board & SOM Supported	Provider
LK Dense Optical Flow iterative and pyramidal based implementation doing motion segmentation	2018.3	ZCU102 ZCU104 Get Started	Xilinx
Stereo Disparity Map Calculates disparity map from two sensor inputs using local block matching
Warp Transform
Harris Corner
Bilateral Filter
Color Space Conversion - RGB/HSV Demonstrates packed and aligned structs that contain pixel values. Passing the structs to a hardware function for RGB to HSV conversion and using a software function to convert HSV back to RGB.		All
Matrix Multiply and Addition 32x32 Floating point matrix multiply and matrix addition. Demonstrates AXI DMA inference as well as direct IP-IP streaming connections
FIR Filter Demonstrates a simple C-callable HDL IP using Xilinx FIR compiler

Community Contributed Design Examples

GitHub Design Examples

Many more OpenCV design examples

Machine Learning Demos

Design Example & Descriptions	Inquiry	Board & SOM Supported	Provider
GoogleNet	SDSoC 2018.3	ZCU102 ZCU104 Ultra96 DPB1303	Xilinx
ResNet50
VGG-16
Mobilenet V2
SSD + 14pt (Pose Estimation)
SSD (Video Analysis)
Yolo v3 (ADAS Detection)
Densebox (Face Detection)
FPN (Semantic Segmentation)

Design Example Offered by Partners

Design Example & Descriptions	Provider
Automotive ADAS Set of different algorithms used in ADAS applications such as: multi-camera Surrounding View, Driver Drowsiness Detection and Smart Rear-View Camera.	Aldec
AES Encryption A 128-bit AES encryption algorithm acceleration	DornerWorks
Face Detection and Tracking Demonstrating how an existing HDL IP can be wrapped into a C-function and used in SDSoC. Face detection from live camera running more than 30 FPS	Xylon
Face & Eye Detection demo Demo shows how to use SDx and TySOM board in Face and Eye detection application.	Aldec
DDS DDS block written in HLS C code outputing various signal patterns to the DAC TX output	Analog Devices
Industrial IoT Demo project shows how to use TySOM board with a robotic arm in industrial applications.	Aldec
IoT Gateway Demo project shows how to use different wireless sensors and actuators in IoT application and how to establish a communication channel with Amazon AWS Iot Cloud.	Aldec

Boards, Kits, & Modules