AR# 34856

描述

解决方案

For a complete list of Known Issues for Spartan-6 FPGAs, please see (Xilinx Answer 40000) for ISE Design Suite 13.x and (Xilinx Answer 35180) for ISE Design Suite 12.x.

Design Advisory Alerted on June 19, 2013
06/13/2013 - (Xilinx Answer 56363) - Design Advisory for Spartan-6 FPGAs - JTAG Boundary Scan testing can fail with inverted values seen on pins when the device is configured

Design Advisory Alerted on June 10, 2013
06/06/2013 - (Xilinx Answer 56113) - Design Advisory for Spartan-6 BUFIO2, DIVIDE = 2 Issue

Design Advisory Alerted on April 02, 2013
03/28/2013 - (Xilinx Answer 55037) - Design Advisory for Spartan-3A and Spartan-6: After SelectMAP configuration, when Readback CRC is enabled and an ABORT is triggered spurious failures may be flagged in Readback CRC

Design Advisory Alerted on November 19, 2012:
11/15/2012 - (Xilinx Answer 52716) - Design Advisory for Spartan-6 FPGAs - Configuration Readback including SEM_IP or POST_CRC causes power distribution network noise affecting SelectIO and GTP interfaces

Design Advisory Alerted on February 13, 2012:
02/10/2012 - (Xilinx Answer 46141) - Design Advisory for Spartan-6 - PLL CLKOUT3 Incorrect Phase Shift

Design Advisory Alerted on December 12, 2011:
12/5/2011 - (Xilinx Answer 45011) - Design Advisory for Spartan-6 - BUFPLL LOCK output always high in Bank 2

Design Advisory Alerted on November 21, 2011:
11/21/2011 - (Xilinx Answer 44174) - Design Advisory for techniques on properly synchronizing flip-flops and SRLs after startup

Design Advisories Alerted on November 7, 2011:
11/07/2011 - (Xilinx Answer 44192) - Design Advisory for Spartan-6 FPGA Speed File - Updates for Block RAM fMAX in Lower Power -1L Devices
11/07/2011 - (Xilinx Answer 44193) - Design Advisory for Spartan-6 FPGA Speed File - Updates for DCM Phase Alignment

Design Advisories Alerted on September 26, 2011:
09/26/2011 - (Xilinx Answer 44192) - Design Advisory for Spartan-6 FPGA Speed File - Updates for Block RAM fMAX in Lower Power -1L Devices
09/26/2011 - (Xilinx Answer 44193) - Design Advisory for Spartan-6 FPGA Speed File - Updates for DCM Phase Alignment

Design Advisory Alerted on July 11, 2011:
07/07/2011 - (Xilinx Answer 39999) - Design Advisory for Spartan-6 - 9K Block RAM Initialization Support

Design Advisories Alerted on April 18, 2011:
04/18/2011 - (Xilinx Answer 41520) - Design Advisory for Spartan-6 MCB - Removal of VCCINT restrictions to reach maximum DDR3 data rates
04/18/2011 - (Xilinx Answer 41083) - Design Advisory for Spartan-6 IODELAY2 - IODELAY2 Data Rate and Corresponding Bit Error Rates for New Mask Revision Silicon

Design Advisory Alerted on April 04, 2011:
04/04/2011 - (Xilinx Answer 41356) - Design Advisory for Lower Power Spartan-6 -1L Speed Grade - IODELAY2 Support Restricted to Tap 0

Design Advisories Alerted on March 01, 2011:
03/01/2011 - (Xilinx Answer 40387) Design Advisory for Spartan-6 Configuration - GCLK0 input can glitch at the end of configuration
02/23/2011 - (Xilinx Answer 40818) Design Advisory for Spartan-6 SelectIO - INTERM_XX not being appropriately turned on in BitGen for Spartan-6 FPGA inputs

Design Advisory Alerted on December 13, 2010:
12/13/2010 - (Xilinx Answer 39582) Design Advisory for Spartan-6 - When using POST_CONFIG_CRC the INIT_B pin can not be User I/O

Design Advisory Alerted on November 15, 2010:
11/11/2010 - (Xilinx Answer 38733) Design Advisory for Spartan-6 - LX100/LX100T SMAP x16 max CCLK frequency reduction

Design Advisories Alerted on October 18, 2010:
10/13/2010 - (Xilinx Answer 38408) Design Advisory for Spartan-6 - IODELAY2 - early edge delays, late edge delays, and single data bit corruption
10/14/2010 - (Xilinx Answer 35881) Design Advisory for 12.2 Timing/Spartan-6 - DRAM/RAMB instance not analyzed under PERIOD/FROM:TO constraint (Not added to timegroups using TNM)

Design Advisory Alerted on July 19, 2010:
07/19/2010 - (Xilinx Answer 35237) Design Advisory for Spartan-6 FPGA GTP Transceiver - SelectIO to GTP Crosstalk/SSO Guidelines

Design Advisories Alerted on June 14, 2010:
06/14/2010 - (Xilinx Answer 35978) Design Advisory for MIG Spartan-6 MCB - Last word of read burst fails in hardware - bitstream update required for all MCB designs
06/14/2010 - (Xilinx Answer 35976) Design Advisory for MIG Spartan-6 MCB - Design does not come out of reset and requires power-cycle to regain functionality - SW / IP update required
06/14/2010 - (Xilinx Answer 35818) Design Advisory for Spartan-6 FPGA - Memory Controller Block (MCB) Performance Change for DDR2 and DDR3 interfaces

Design Advisory Alerted on April 26, 2010:
04/20/2010 (Xilinx Answer 35237) Design Advisory for Spartan-6 FPGA GTP Transceiver - SelectIO to GTP Crosstalk/SSO Guidelines

Design Advisory Alerted on March 29, 2010:
3/25/2010 (Xilinx Answer 34712) Design Advisory for Spartan-6 FPGA Block RAM - 9K Simple Dual Port (SDP) Block RAM Initialization Incorrect

Design Advisories Alerted on March 22, 2010:
03/19/2010 (Xilinx Answer 34541) Design Advisory for Spartan-6 FPGA Block RAM - 9K Block RAM SDP Port Width Restriction
03/19/2010 (Xilinx Answer 34533) Design Advisory for Spartan-6 FPGA Block RAM - Address Space Overlap

Revision History

06/14/13 - Added 56363
06/06/13 - Added 56113
03/28/13 - Added 55037
11/15/12 - Added 52716
02/10/12 - Added 46141
12/12/11 - Updated title for 44174
12/05/11 - Added 45011
11/21/11 - Added 44174
11/07/11 - Updated 44192 and 44193
09/26/11 - Added 44192 and 44193
07/15/11 - Minor formatting changes
07/11/11 - Added 39999
04/18/11 - Adding 41520 and 41083, also link to 40000 for ISE software 13.1 Known Issues
04/04/11 - Adding 41356
03/01/11 - Added 40387 and 40818
12/13/10 - Added 39582
11/15/10 - Added 38733
10/15/10 - Added 38408 and 35881
07/16/10 - Added 35237
06/14/10 - Added 35978, 35976, and 35818
05/24/10 - Added 35180 for ISE software 12.1 Known Issues
04/26/10 - Added 35237
03/25/10 - Added 34712
03/24/10 - Minor format change
03/22/10 - Initial release 34541 and 34533

链接问答记录

主要问答记录

子答复记录

相关答复记录