The following UltraScale+™ devices are introduced in this release:
This release includes updates to these other popular IP cores:
There are no new IP cores in this release
New Core Versions | Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq-7000 | UltraScale | UltraScale+ | |||||||
Audio, Video & Image Processing | ||||||||||||||
DisplayPort v7.0 | ✓ | PG064 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
HDMI 1.4/2.0 (v2.0) | ✓ | PG236 (RX) PG235 (TX) |
AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
SMPTE2022-1,2 (v2.0) | ✓ | PG181 (RX) PG180 (TX) |
AXI4 AXIR-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
Video PHY Controller (v2.0) (DisplayPort) |
PG230 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | |||||||||
Communications & Networking | ||||||||||||||
Aurora | Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq-7000 | UltraScale | UltraScale+ | |||||||
Aurora 8B/10B * (v11.0) | ✓ | PG046 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | |||||||
Aurora 64B/66B * (v11.1) | ✓ | PG074
|
AXI4-Stream | ✓ | ✓ | ✓ | ✓ | |||||||
Ethernet | ||||||||||||||
10G/25G Ethernet Subsystem (25GEMAC / 25GBASE-KR) (v1.2) |
✓ | PG210 | AXI4 | ✓ | ✓ | |||||||||
25G IEEE 802.3by RS-FEC (v1.0) | ✓ | PB035 | AXI4-Lite | Virtex UltraScale | ✓ | |||||||||
40G/50G Ethernet Subsystem (50GEMAC) (v1.1) | ✓ | PG211 | AXI4-Stream |
Virtex UltraScale | Kintex UltraScale | |||||||||
UltraScale Integrated 100G Ethernet MAC/PCS (CMAC) (v1.10) | ✓ | PG165 | ✓ | |||||||||||
Interlaken | ||||||||||||||
UltraScale Interlaken* (v1.10) | PG169 | Virtex UltraScale |
||||||||||||
Interlaken 150G (soft) (v1.5) | ✓ | PG212 | Kintex-7 Virtex-7 |
✓ | ||||||||||
Wireless | ||||||||||||||
JESD204 PHY (v3.1) | ✓ | PG198 | ✓ | ✓ | ✓ | ✓ | ||||||||
Embedded | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq-7000 | UltraScale | UltraScale+ | ||||||||
AXI 1G/2.5G Ethernet Subsystem* (v7.0) | PG138 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
Zynq UltraScale+ MPSoC Processing System IP* (v1.2) | PG201 | Zynq UltraScale+ | ||||||||||||
FPGA Features & Debug | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq-7000 | UltraScale | UltraScale+ | ||||||||
Clocking Wizard * (v5.3) | PG065 | AXI4-Lite | ✓ | ✓ | ✓ | ✓ | ||||||||
IBERT for 7 Series GTH Transceivers* (v3.0) | PG152 | Virtex-7 | ||||||||||||
IBERT for 7 Series GTP Transceivers* (v3.0) |
PG133 | Artix-7 |
||||||||||||
IBERT for 7 Series GTX Transceivers* (v3.0) |
PG132 | Kintex-7 Virtex-7 |
✓ | |||||||||||
IBERT for 7 Series GTZ Transceivers* (v3.1) | PG171 |
Virtex-7 | ||||||||||||
IBERT for UltraScale GTH Transceivers* (v1.3) | PG173 |
✓ | ||||||||||||
IBERT for UltraScale GTY Transceivers* (v1.2) | PG196 |
✓ | ✓ | |||||||||||
Interconnect Infrastructure | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq-7000 | UltraScale | UltraScale+ | ||||||||
JTAG to AXI Master (v1.1) | PG174 |
AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
Memories & Storage Elements | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq-7000 | UltraScale | UltraScale+ | ||||||||
Block Memory Generator* (v8.3) | PG058 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
FIFO Generator* (v13.1) | PG057 | AXI3 AXI4 AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | ||||||||
Memory Interface* UltraScale/UltraScale+ v1.2 7 Series v4.0 |
✓ | ✓ | ✓ | ✓ | ||||||||||
Interface and Interconnect | ||||||||||||||
Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq-7000 | UltraScale | UltraScale+ | ||||||||
PCI Express® | ||||||||||||||
AXI Memory Mapped to PCI Express (PCIe) Gen2* (v2.8) | PG055 | AXI4 | ✓ | ✓ | ||||||||||
AXI Bridge PCI Express (PCIe) Gen3 Subsystem* (v2.1) | PG194 | AXI4 | Virtex-7 XT | ✓ | ||||||||||
DMA for PCI Express (PCIe) Subsystem* (v2.0) |
PG195 | AXI4 AXI4-Lite AXI4-Stream |
Virtex-7 XT | ✓ | ||||||||||
PCI Express PHY* (v1.0) UltraScale+ Device Intergrated Block for PCI Express |
PG239 | ✓ | ✓ | |||||||||||
UltraScale+ Device Integrated Block for PCI Express* (PCIe) (v1.1) |
|
AXI4-Stream |
✓ | |||||||||||
UltraScale FPGAs Gen3 Integrated Block for PCI Express (PCIe) * (v4.2) | PG156 | AXI4-Stream | ✓ | |||||||||||
Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe) * (v4.2) | PG023 | AXI4-Stream | Virtex-7 XT Virtex-7 HT |
|||||||||||
7 Series Integrated Block for PCI Express (PCIe) Gen2* (v3.3) | PG054 | AXI4-Stream | ✓ | ✓ |
*Included at no additional charge with Vivado
**Included at no additional charge with EDK